A Linear Ultralow Flicker Noise Switched-Transconductance Downconversion Mixer

This article introduces a current-mode active double-balanced downconversion switched-transconductance (SwG_m) mixer designed to address the adverse issues associated with partially up-converted flicker noise and second-order intermodulation (IM2) term in (SwG_m) mixers. The proposed architecture swaps drain and source connections of transconductance (G_m) stage at each half cycle of the local oscillator (LO). The swapping, which results in a symmetrical G_m profile with zero average value, is facilitated by series capacitors and ensures complete up-conversion of undesired low-frequency components. Compared to previous solutions, this method offers significant improvements, including a notably reduced flicker corner frequency and a better suppression of thermal noise. In addition, it eliminates the typical voltage headroom constraints caused by resistive loads. A proof-of-concept prototype mixer is fabricated in a 65-nm CMOS technology and operates at 6 GHz with an intermediate frequency (IF) bandwidth of 100 MHz. Experimental results demonstrate a competitive performance, including a 7-dB noise figure (NF) from 10 kHz to 100 MHz, a very low flicker corner frequency of 1 kHz, low power consumption of 3 mW from a 1-V supply, an 11.8-dB conversion gain (CG), average IIP2 and third-order input intercept point (IIP3) values of 75 and 0.9 dBm, respectively, and a compact layout of 0.396