AnARM: A 28nm energy efficient ARM processor based on octasic asynchronous technology

Mickael Fiorentino; Claude Thibeault; Yvon Savaria; Francois Gagnon; Tom Awad; Doug Morrissey; Michel Laurence

doi:10.1109/ASYNC.2019.00016

AnARM: A 28nm energy efficient ARM processor based on octasic asynchronous technology

Mickael Fiorentino
, Claude Thibeault
, Yvon Savaria
, Francois Gagnon
, Tom Awad
, Doug Morrissey
, Michel Laurence

Research output: Contribution to Book/Report types › Contribution to conference proceedings › peer-review

3 Citations (Scopus)

Abstract

We present the AnARM, an energy-efficient ARM processor core that leverages the self-timed design technique developed at Octasic. It was fabricated using the STMicro-electronics 28nm FDSOI technology, using standard cells and conventional CAD tools. The AnARM delivers 3066 CoreMark while consuming 70 mW of power, providing an energy-efficiency improvement of 59% over a reference ARM Cortex-A7.

Original language	English
Title of host publication	Proceedings - 2019 25th IEEE International Symposium on Asynchronous Circuits and Systems, ASYNC 2019
Publisher	IEEE Computer Society
Pages	58-59
Number of pages	2
ISBN (Electronic)	9781538647479
DOIs	https://doi.org/10.1109/ASYNC.2019.00016
Publication status	Published - May 2019
Event	25th IEEE International Symposium on Asynchronous Circuits and Systems, ASYNC 2019 - Hirosaki, Japan Duration: 12 May 2019 → 15 May 2019

Publication series

Name	Proceedings - International Symposium on Asynchronous Circuits and Systems
Volume	2019-May
ISSN (Print)	2643-1394
ISSN (Electronic)	2643-1483

Conference

Conference	25th IEEE International Symposium on Asynchronous Circuits and Systems, ASYNC 2019
Country/Territory	Japan
City	Hirosaki
Period	12/05/19 → 15/05/19

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

SDG 7 Affordable and Clean Energy

!!!Keywords

28nm
Asynchronous Processor
Octasic

Access to Document

10.1109/ASYNC.2019.00016

Cite this

Fiorentino, M., Thibeault, C., Savaria, Y., Gagnon, F., Awad, T., Morrissey, D., & Laurence, M. (2019). AnARM: A 28nm energy efficient ARM processor based on octasic asynchronous technology. In Proceedings - 2019 25th IEEE International Symposium on Asynchronous Circuits and Systems, ASYNC 2019 (pp. 58-59). Article 8850655 (Proceedings - International Symposium on Asynchronous Circuits and Systems; Vol. 2019-May). IEEE Computer Society. https://doi.org/10.1109/ASYNC.2019.00016

Fiorentino, Mickael ; Thibeault, Claude ; Savaria, Yvon et al. / AnARM : A 28nm energy efficient ARM processor based on octasic asynchronous technology. Proceedings - 2019 25th IEEE International Symposium on Asynchronous Circuits and Systems, ASYNC 2019. IEEE Computer Society, 2019. pp. 58-59 (Proceedings - International Symposium on Asynchronous Circuits and Systems).

@inproceedings{5472ae923e6a4794b1a7425e0fcbcf00,

title = "AnARM: A 28nm energy efficient ARM processor based on octasic asynchronous technology",

abstract = "We present the AnARM, an energy-efficient ARM processor core that leverages the self-timed design technique developed at Octasic. It was fabricated using the STMicro-electronics 28nm FDSOI technology, using standard cells and conventional CAD tools. The AnARM delivers 3066 CoreMark while consuming 70 mW of power, providing an energy-efficiency improvement of 59\% over a reference ARM Cortex-A7.",

keywords = "28nm, Asynchronous Processor, Octasic",

author = "Mickael Fiorentino and Claude Thibeault and Yvon Savaria and Francois Gagnon and Tom Awad and Doug Morrissey and Michel Laurence",

note = "Publisher Copyright: {\textcopyright} 2019 IEEE.; 25th IEEE International Symposium on Asynchronous Circuits and Systems, ASYNC 2019 ; Conference date: 12-05-2019 Through 15-05-2019",

year = "2019",

month = may,

doi = "10.1109/ASYNC.2019.00016",

language = "English",

series = "Proceedings - International Symposium on Asynchronous Circuits and Systems",

publisher = "IEEE Computer Society",

pages = "58--59",

booktitle = "Proceedings - 2019 25th IEEE International Symposium on Asynchronous Circuits and Systems, ASYNC 2019",

}

Fiorentino, M, Thibeault, C, Savaria, Y, Gagnon, F, Awad, T, Morrissey, D & Laurence, M 2019, AnARM: A 28nm energy efficient ARM processor based on octasic asynchronous technology. in Proceedings - 2019 25th IEEE International Symposium on Asynchronous Circuits and Systems, ASYNC 2019., 8850655, Proceedings - International Symposium on Asynchronous Circuits and Systems, vol. 2019-May, IEEE Computer Society, pp. 58-59, 25th IEEE International Symposium on Asynchronous Circuits and Systems, ASYNC 2019, Hirosaki, Japan, 12/05/19. https://doi.org/10.1109/ASYNC.2019.00016

AnARM: A 28nm energy efficient ARM processor based on octasic asynchronous technology. / Fiorentino, Mickael; Thibeault, Claude; Savaria, Yvon et al.
Proceedings - 2019 25th IEEE International Symposium on Asynchronous Circuits and Systems, ASYNC 2019. IEEE Computer Society, 2019. p. 58-59 8850655 (Proceedings - International Symposium on Asynchronous Circuits and Systems; Vol. 2019-May).

Research output: Contribution to Book/Report types › Contribution to conference proceedings › peer-review

TY - GEN

T1 - AnARM

T2 - 25th IEEE International Symposium on Asynchronous Circuits and Systems, ASYNC 2019

AU - Fiorentino, Mickael

AU - Thibeault, Claude

AU - Savaria, Yvon

AU - Gagnon, Francois

AU - Awad, Tom

AU - Morrissey, Doug

AU - Laurence, Michel

PY - 2019/5

Y1 - 2019/5

N2 - We present the AnARM, an energy-efficient ARM processor core that leverages the self-timed design technique developed at Octasic. It was fabricated using the STMicro-electronics 28nm FDSOI technology, using standard cells and conventional CAD tools. The AnARM delivers 3066 CoreMark while consuming 70 mW of power, providing an energy-efficiency improvement of 59% over a reference ARM Cortex-A7.

AB - We present the AnARM, an energy-efficient ARM processor core that leverages the self-timed design technique developed at Octasic. It was fabricated using the STMicro-electronics 28nm FDSOI technology, using standard cells and conventional CAD tools. The AnARM delivers 3066 CoreMark while consuming 70 mW of power, providing an energy-efficiency improvement of 59% over a reference ARM Cortex-A7.

KW - 28nm

KW - Asynchronous Processor

KW - Octasic

UR - https://www.scopus.com/pages/publications/85073357272

U2 - 10.1109/ASYNC.2019.00016

DO - 10.1109/ASYNC.2019.00016

M3 - Contribution to conference proceedings

AN - SCOPUS:85073357272

T3 - Proceedings - International Symposium on Asynchronous Circuits and Systems

SP - 58

EP - 59

BT - Proceedings - 2019 25th IEEE International Symposium on Asynchronous Circuits and Systems, ASYNC 2019

PB - IEEE Computer Society

Y2 - 12 May 2019 through 15 May 2019

ER -

Fiorentino M, Thibeault C, Savaria Y, Gagnon F, Awad T, Morrissey D et al. AnARM: A 28nm energy efficient ARM processor based on octasic asynchronous technology. In Proceedings - 2019 25th IEEE International Symposium on Asynchronous Circuits and Systems, ASYNC 2019. IEEE Computer Society. 2019. p. 58-59. 8850655. (Proceedings - International Symposium on Asynchronous Circuits and Systems). doi: 10.1109/ASYNC.2019.00016

AnARM: A 28nm energy efficient ARM processor based on octasic asynchronous technology

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