Abstract

This paper describes research to integrate various software-defined radio-based communications, navigation, and surveillance systems into a system-on-chip platform. The platform is powered by a multi-core processor and operates on a real-time operating system designed with robust time and space partitioning capabilities, to ensure deterministic performance, fault isolation and secure multi-partition execution (in parallel) within a single hardware environment. As part of the validation process, a case study was conducted with an analysis of results from both laboratory tests and real-world flight tests. These evaluations aim to showcase the feasibility and stability of the proposed design while highlighting significant improvements in the performance and integration of the hardware and software systems and ensuring reliability and robustness in practical aviation scenarios.

Original languageEnglish
Title of host publicationDASC 2025 - Digital Avionics Systems Conference, Conference Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9798331525194
DOIs
Publication statusPublished - 2025
Event44th AIAA DATC/IEEE Digital Avionics Systems Conference, DASC 2025 - Montreal, Canada
Duration: 14 Sept 202518 Sept 2025

Publication series

NameAIAA/IEEE Digital Avionics Systems Conference - Proceedings
ISSN (Print)2155-7195
ISSN (Electronic)2155-7209

Conference

Conference44th AIAA DATC/IEEE Digital Avionics Systems Conference, DASC 2025
Country/TerritoryCanada
CityMontreal
Period14/09/2518/09/25

!!!Keywords

  • Certification
  • Multi-core processors
  • Safety-critical systems
  • Software-defined radio
  • TSP

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