An FPGA-Based On-the-Fly Reconfigurable Low-Power SHEPWM Inverter with a Compact SiP Implementation

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Résumé

This article presents a selective harmonic elimination pulsewidth modulation (PWM) (SHEPWM) full-bridge inverter featuring real-time on-the-fly reconfigurability of output waveform amplitude and frequency using a field-programmable gate array (FPGA). The inverter is integrated on a compact three-dimensional (3-D) system-in-package using low-temperature cofired ceramics as a substrate, reducing the printed circuit board (PCB) area. Validated through simulations and measurements at 0.12W and 1.2W peak output power, the inverter cancels harmonics up to the 34th order at switching nodes. With an LC filter having a 20kHz cut-off frequency, total harmonic distortion at the load is below 5.1% for alternating current output signals, varying in modulation index from 0.2 to 0.9 and output frequencies from 5 to 10 kHz. The results also showed that for the same inverter conditions and output THD, the SHEPWM inverter with 0.12W output power has an average of 17.3% and 4.2% better efficiency than a natural PWM (NPWM) inverter with an output frequency of 4Hz and 10kHz, respectively. For the inverter of 1.2W output power, the SHEPWM inverter maintains better efficiency than the NPWM counterpart, by an average of 2.3% and 6.9%, respectively.

langue originaleAnglais
Pages (de - à)5942-5953
Nombre de pages12
journalIEEE Transactions on Power Electronics
Volume39
Numéro de publication5
Les DOIs
étatPublié - 1 mai 2024

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