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Keyphrases
Aerospace Applications
9%
Asynchronous Circuits
10%
Avionics
13%
Bridging Faults
23%
Clock Frequency
10%
Current Test
19%
Decoder
33%
Decoding Algorithm
9%
Defect Tolerant
23%
Delay Faults
9%
Delayed Testing
22%
Design Flow
16%
Diagnostic Methods
17%
Emulation
15%
Equalizer
11%
Error-correction Performance
13%
Fault Detection
10%
Fault Injection
20%
Fault Site
10%
Fault-free
9%
Field Programmable Gate Array
19%
Flight Control System
13%
FPGA Implementation
15%
IDDQ Testing
17%
Integrated Circuits
30%
Latency
10%
Levels of Abstraction
9%
List Decoder
12%
Low Latency
12%
Maximum Likelihood Estimation
9%
Measurement Techniques
9%
Order of Magnitude
12%
Polar Codes
39%
Polar Decoder
31%
Probabilistic Signature
19%
Proposed Architecture
9%
Quiescent Current
11%
Reconfiguration
9%
Self-timed
16%
Single Event Upset
25%
Small Delay Defects
11%
Software Defined Radio
15%
Speedup Ratio
9%
SRAM-based FPGA
29%
Successive-cancellation Decoding
15%
Synchronous Design
9%
Test Generation
9%
Test Pattern
17%
Test Quality
18%
Yield Model
11%
Computer Science
Application Specific Integrated Circuit
10%
Asynchronous Circuit
11%
Avionics
16%
Benchmark Circuit
10%
Bridging Fault
15%
Case Study
9%
Cyclostationary
7%
Decoding Algorithm
23%
Diagnosis
7%
Digital Filter
7%
Digital Platform
7%
Digital Signal Processing
8%
Dynamic Voltage Scaling
7%
Emulation
18%
Energy Consumption
7%
Energy Efficiency
9%
Error Correction
28%
Error-correcting code
7%
Experimental Result
22%
Fault Injection
15%
Fault Tolerant
7%
Field Programmable Gate Array
100%
Functional Testing
7%
Functional Verification
8%
Hardware Implementation
14%
High Throughput
7%
Input/Output
7%
Integrated Circuit
24%
Likelihood Estimation
9%
maximum-likelihood
9%
Memory Requirement
9%
Model Checking
7%
Optimization Technique
7%
Performance Analysis
7%
Postprocessing
11%
Power Consumption
8%
Power Distribution Network
7%
Probability
14%
Process Variation
8%
Random Pattern
9%
Register-Transfer Level
7%
Soft Error
13%
Software Implementation
11%
software-defined radio
7%
Synchronous Design
8%
Testbed
7%
Timing Constraint
8%
Transient Fault
7%
Variance Reduction
7%
Viterbi Algorithm
7%
