TY - GEN
T1 - An Inductorless Downconversion Mixer with 24.2-dB CG, 8.2-dB NF, 350-μW Power, and 50-Hz Flicker-Noise Corner Frequency at -5-dBm LO
AU - Aarani, Saeed Ghaneei
AU - Beigi, Amin
AU - Nabki, Frederic
AU - Mirabbasi, Shahriar
AU - Gosselin, Benoit
N1 - Publisher Copyright:
© 2026 IEEE.
PY - 2026
Y1 - 2026
N2 - This paper presents an inductorless downconversion mixer that achieves high conversion gain, low noise, and an ultra-low flicker-noise corner frequency with sub-mW power consumption. Designed and laid out in a 65-nm CMOS, the proposed architecture reuses current in complementary branches and employs a dedicated current-bleeding path whose noise is actively canceled by the switching devices. Thus, the presented structure achieves low noise while facilitating high gain performance. Moreover, by turning off the switches at local oscillator (LO) zero crossings, both direct and indirect flicker-noise mechanisms are attenuated without requiring inductors. Post-layout simulations at 2.4 GHz show a conversion gain of 24.2 dB, a noise figure of 8.2 dB with a flicker noise corner frequency of ~50 Hz, an IIP3 of -20 dBm, while operating with a -5-dBm LO, from a 1.5-V supply and consuming 350 μW. The design has compact active area of 0.0234 mm2.
AB - This paper presents an inductorless downconversion mixer that achieves high conversion gain, low noise, and an ultra-low flicker-noise corner frequency with sub-mW power consumption. Designed and laid out in a 65-nm CMOS, the proposed architecture reuses current in complementary branches and employs a dedicated current-bleeding path whose noise is actively canceled by the switching devices. Thus, the presented structure achieves low noise while facilitating high gain performance. Moreover, by turning off the switches at local oscillator (LO) zero crossings, both direct and indirect flicker-noise mechanisms are attenuated without requiring inductors. Post-layout simulations at 2.4 GHz show a conversion gain of 24.2 dB, a noise figure of 8.2 dB with a flicker noise corner frequency of ~50 Hz, an IIP3 of -20 dBm, while operating with a -5-dBm LO, from a 1.5-V supply and consuming 350 μW. The design has compact active area of 0.0234 mm2.
KW - Conversion Gain (CG)
KW - current bleeding
KW - flicker noise
KW - Noise Figure (NF)
UR - https://www.scopus.com/pages/publications/105043507064
U2 - 10.1109/ISCAS66217.2026.11562399
DO - 10.1109/ISCAS66217.2026.11562399
M3 - Contribution to conference proceedings
AN - SCOPUS:105043507064
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
SP - 1012
EP - 1016
BT - ISCAS 2026 - 2026 IEEE International Symposium on Circuits and Systems
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2026 IEEE International Symposium on Circuits and Systems, ISCAS 2026
Y2 - 24 May 2026 through 27 May 2026
ER -