Assemblage et interconnexion de composant électro-optique au-dessus de 100 GHz

Abstract

The increasing demand for data rates in modern high-speed links calls for new updated systems operating in high millimetre-wave frequency with a very large bandwidth. Over the past few decades, semiconductor devices have attained new heights in terms of frequency limits by reaching THz frequencies. Furthermore, optical modulators are now achieving a beyond-100- GHz large-signal modulation bandwidth in hybrid silicon photonics. The main challenge that such systems are currently facing is the lack of efficient broadband interconnections. Conventional packaging techniques like the wirebond exhibit poor performance at THz frequencies because of high inductive behaviour. However, flip-chip technology seems to be the most promising option for broadband THz interconnects. Numerous broadband Flip-Chip transitions from DC to beyond 100 GHz have been demonstrated in the literature using different techniques and bump technologies. The problem is that many are not cost-effective or use really complex processes that are not suitable for mass production. However, there is one interesting type of bonding technique that is highly accessible, has excellent repeatability, low cost and allows small pitches for high signal density. This technology is called the gold stud bumping and it is made using a wire bonder. One of the advantages of this technique is the fact that the gold stud can be stacked in order to reduce the capacitive behaviour of the Flip-Chip transition and makes it easier to achieve greater bandwidth with less compensation or simply be used as a flexible option to satisfy the needs of a designer. In the literature, good broadband performance has been demonstrated for stacked gold studs in single-ended chip-to-chip interconnections above 100 GHz but chip-to-package and differential transitions are yet to be demonstrated. This work aims to study the use of stacked gold stud bump chip-to-package interconnects from DC to above 100 GHz for single ended and differential coplanar waveguide transitions. In order to respect the contextualization aspect, the choices of the package and chip substrates are chosen to be LTCC and silicon, respectively. Full-wave simulations using HFSS have been used for optimization and compensation in order to find candidates exhibiting good broadband performance. The experimental Flip-Chip assembly has been characterized from DC to 110 GHz using RF probes. Finally, design rules have been extracted to help guide future designers wishing to use this technology.

Date	10 Jun 2025
Original language	French
Awarding Institution	École de technologie supérieure
Supervisor	Dominic Deslandes (Supervisor)