The combination of digital signal processing with the optimized design of the RF front-end section is the way in the development of emerging new architecture of smart transmitters. More particularly, this technique is used in modern amplification systems in order to improve linearity and/or energy efficiency. This work concerns the LINC amplification technique which involves the decomposition of amplitude and phase modulated signal to two only phase-modulated signals. These two signals are modulated around an RF frequency, amplified separately by two nonlinear amplifiers and finally, recombined to generate an amplified version of the original signal. However, the main limitation of this architecture is the imbalance between the two branches which may be due to imperfections in the signal generator and/or in the RF stage. Indeed, any imbalance between these branches leads to a distortion of the signal output and an increase in errors at the receiver.
In this context, our work is to develop a hardware platform in LACIME laboratory which can generate a multitude of signals and decompose them with the LINC technique. This platform is composed of two parts. The first part is for the digital generation and decomposition of a baseband / IF signal on a FPGA Xilinx Virtex-4. The second part concerns the design of the RF front-end where the decomposed signals are transposed to RF frequency. This platform offers users the ability to generate different types of MQAM modulations (BPSK, QPSK, 16QAM, 64QAM) and the choice of symbol rate. The signal decomposition method is implemented by a single dimension LUT to optimize the resources used. Two options are offered for the RF conversion. The first is the direct conversion of baseband signals to the RF frequency. The second is heterodyne, allows an intermediate conversion to IF frequency around 30 MHz before the transposition to the RF frequency. The goal is to develop a wideband system with a RF frequency centred around 2 to 4 GHz, so we opted for directconversion architecture to minimize the associated costs. Finally, a feedback loop was also designed to sample the output signal and compensate errors due to imbalances.
| Date | 11 Jan 2011 |
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| Original language | French |
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| Awarding Institution | - École de technologie supérieure
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| Supervisor | Ammar B. Kouki (Supervisor) |
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Chabaane, Y. (Author),
Kouki (Supervisor),
11 Jan 2011Student thesis: Master's thesis › Master in Engineering: Electrical Engineering