The use of on-board electronics in the automotive field continues to increase and especially with the appearance of autonomous vehicles. This domain is characterized by very stringent reliability requirements for integrated circuits, including field-programmable gate arrays (FPGAs). These reliability requirements are such that it becomes relevant to investigate infield error sources that are usually neglected, such as cosmic radiation, knowing that the most popular FPGAs, the SRAM-based ones, are particularly sensitive to this error source. This requires researchers to develop strategies that allow these circuits to tolerate the effect of radiation and improve their reliability. The development of such strategies requires that they be validated throughout the design process, and ideally as early as possible.
In this thesis, we validate high-level structural fault models, allowing to mimic the effect of singular events (SEU: Single Event Upset) induced by cosmic radiation, and thus observe their influences very early in the design process. More specifically, we validate a strategy that assumes that applying these high-level structural fault models only at the inputs/outputs of a given block leads to faulty results similar to those obtained by bombarding the block with ionizing particles. An experimental setup has been developed to perform this validation. The setup is based on a Harware-In-the-Loop (HIL) approach. It contains a Matlab/Simulink simulation model as well as a SRAM-based FPGA board. The FPGA is used to implement a Sobel filter, which is often utilized in the detection of obstacles for autonomous cars. It is also used to implement an IP core, called SEM, allowing SEU emulation. The Matlab/Simulink model allows measuring and comparing the effects of both error sources (emulated SEUs and high-level structural fault models) at the Sobel filter output. The same effects are also measured and compared at the output of a block usually found downstream of the Sobel filter for obstacle detection, namely a Hough transform. The metrics used for these comparisons are described. The results validate the high-level fault injection strategy targeting block I/Os.
| Date | 9 Aug 2021 |
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| Original language | French |
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| Awarding Institution | - École de technologie supérieure
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| Supervisor | Claude Thibeault (Supervisor) |
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Hajji, T. (Author),
Thibeault (Supervisor),
9 Aug 2021Student thesis: Master's thesis › Master in Engineering: Electrical Engineering