This thesis covers the design and the trial of a 65-nm CMOS circuit that functions both as a power detector and a mixer, thanks to the square-law properties of its transistors.
Future 5G and 6G networks will integrate a great number of satellite nodes, requiring simple antennas with beam-forming capabilities. Reconfigurable reflectarray antennas, using diode-based phase shifters, are well-suited for such applications. This work contributes to the enhancement of these antennas. The goal of our circuit is to allow smarter control of the biasing of varicap diodes, which are notorious for their tendency to distort signals, by measuring the power and the distorsion of the signal.
Following a theoretical analysis, we designed a simple and easily integrable square-law detector mixer. The circuit is based on the design of an existing power envelope detector. Then, we conceived a printed circuit board designed to host the chip for measurements.
Through experimental validation, we confirmed the circuit’s dual functionality. The circuit boasts a dynamic range of 27.7 dB as a detector and 42 dB as a mixer. It also demonstrates an intermodulation rejection ratio exceeding 30 dB across most of the dynamic range. The circuit can process signals of up to 10.5 GHz, with an estimated output bandwidth of 1 GHz. This very simple circuit covers an area of 1,507.7 μm2 and consumes at most 3.3 mW of power. Although other detectors and mixers have proven to have better performance figures, these results are encouraging and motivate further exploration of square-law circuits and improvement upon our design.
| Date | 19 Feb 2026 |
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| Original language | French |
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| Awarding Institution | - École de technologie supérieure
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| Supervisor | Nicolas Constantin (Supervisor) |
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Millet, E. (Author),
Constantin (Supervisor),
19 Feb 2026Student thesis: Master's thesis › Master in Engineering: Electrical Engineering