Modeling the faulty behaviour of digital designs using a feed forward neural network based approach

Abstract

Cosmic rays lead to soft errors in electronic circuits. In avionic systems it is more critical, as the neutron flux that is caused by cosmic rays is stronger at high altitudes. It would be helpful to study the faulty behaviour of digital circuits before implementation to analyze their robustness in presence of faults. The goal of this research is to develop an approach for modeling the faulty behaviour of digital circuits. This proposed approach could be applied in a design flow before circuit fabrication to characterize the faulty behaviour of circuits for their early validation. This is achieved by extracting information about faulty behaviour of circuits from low-level models expressed in VHDL language. Afterwards the extracted information is used to train high-level artificial neural networks models expressed in C/C++ or MATLABTM languages. The trained neural network becomes a model able to replicate the faulty behaviour of the circuit in presence of faults. Later, trained artificial neural network models could be used to develop a components characterization library available in Matlab/Simulink regrouping different classes of circuits. These pre-defined faulty component models could also be used in high-level models to conduct reliability analysis. Thus, the faulty behaviour of each sub-circuit and their effects on a system could be assessed. The methodology adopted in this thesis is based on experiments done with two important benchmarks. First, the faulty behaviour of the C17 ISCAS circuit is modeled using a neural network approach. To validate our method, the results are compared with a previously reported faulty signature generation method. Then, our proposed technique is tested with a 4 bit multiplier design, which has a larger dataset. Results show that the neural network approach leads to models that are more accurate than the signature generation method. For the circuit C17, by taking only 30% of the dataset generated with the LIFTING fault simulator, the neural network is able to replicate the output of the circuit in presence of faults while keeping the mean absolute modeling error below 6%.

Date	19 Sept 2014
Original language	American English
Awarding Institution	École de technologie supérieure
Supervisor	Jean-François Boland (Supervisor) & Yvon Savaria (Co-supervisor)