Multi-rate real-time simulation of modular multilevel converter using CPU and FPGA

Abstract

This thesis presents the real-time simulation of a modular multilevel converter (MMC) using Field Programmable Gates Array (FPGA). Undertaking such a project raises challenges due to the very high number of components in MMC. The choice of the hardware used is justified by this particular problematic. Using FPGA, a very large number of inputs and outputs can be easily managed. By simulating the converter on FPGA reduces latency and the delays between the IOs and the MMC. It also allows using very small time-step ensuring accuracy for pulses detection. Only the converter is simulated on FPGA and the remaining component of the simulation, such as the AC system and its distribution network are simulated on CPU. Doing so gives the user access to large library of component from commercial software. Using two distinct platforms, CPU and FPGA, then requires the model not only to be decoupled, but also to use different sampling time. This thesis debuts by a presentation of the problematic. Then, the required sampling time for accurate simulation of MMC is demonstrated. In order to achieve such a small time-step, a decoupling method and its validation is proposed. The method is then generalized and applied to multi-rate simulation. Using those methods, a details implementation of the converter, using OPAL-RT technologies real-time simulator, is given. Finally, numerical and experimental validation of this model are presented.

Date	5 May 2016
Original language	American English
Awarding Institution	École de technologie supérieure
Supervisor	Kamal Al-Haddad (Supervisor) & Handy Fortin Blanchette (Co-supervisor)