Noise propagation in power converter : modeling and attenuation approaches

Abstract

In this thesis, an analysis of noise propagation and complete design guidelines for low noise low power circuit of a power converter is presented. In literature, majority of publication deal with noise propagation in the high power circuit resulting in high EMI, which may not pass EMI standards. Unfortunately, EMI standards are not relevant to solve EMI issues in the board level. Consequently, this thesis focuses on noise propagation in the low power circuit, consisting of sensing and control circuits. Noise in the low power circuit can create noisy feedback signals, leading to bad performance and poor reliability converter. In order to resolve this issue, this thesis helps the designers to understand well noise in low power circuit in term of its existence, source and propagation paths. Based on this knowledge, noise mitigation techniques are developed to ensure the performance and reliability of the power converter. The proposed methods can be applied in the early design stage or improving noise profile of a complete converter. This thesis begins with the experimental observations of noise in the low power circuit of a typical Buck converter in several operating points of the high power circuit and different components of low power circuit. Based on the experimental results, the noise propagation paths are analyzed without considering differential (DM) and common modes (CM) separately. To further understand the effects of converter design on noise profile, the fundamental parts of the low power circuit including Gate driver, passive devices and low power rails supplying all functional circuits, are studied. These researches result in the proposed models of Gate driver at high frequency, the General Impedance Representation (GIR) of passive devices, and the computational model of the low power rails, which will be presented in the contents of this thesis. Furthermore, the noise mitigation techniques are developed to reduce noise in the low power circuit based on knowledge of these aforementioned parts. Noise is attenuated locally at the Gate driver by using Y-capacitor. In addition, the GIR and 2D model of low power rails provide powerful tools for optimal design. In each part of this thesis, the literature review, proposed models/approaches, computational and experimental results will be presented to validate the effectiveness of the thesis contributions.

Date	20 Mar 2018
Original language	American English
Awarding Institution	École de technologie supérieure
Supervisor	Handy Fortin Blanchette (Supervisor)