Optimisation des plages dynamiques des convertisseurs analogique-numérique Sigma-Delta

Abstract

Sigma-Delta converters combine the techniques of noise shaping and oversampling to reduce the impact of quantization noise on the signal to noise ratio (SNR). To maximize the performance of the converters, many parameters must be optimized during the design process. The principal problem of this work is the optimization of interstage coefficients of the modulator. These coefficients can be used to reduce the integrator output swing which reduces the harmonic distortion and power consumption. However, the thermal noise generated by each stage of integration is amplified which reduces the SNR at the output of the converter. A compromise is usually reached at the end of the design process after few iterations of simulations. This paper presents two new techniques to optimize Sigma-Delta converters. The first one, called windows method, is focused on minimizing the output swing of integrators based on a penalty in SNR. This is an iterative process that runs inside a window of operation. The second method uses a multi-criteria optimization function to simultaneously minimize the output swing of the integrators and the sum of the capacitor of the modulator. Reducing the size of the capacitors reduces the circuit size and power consumption. Each of the two methods is illustrated by an example. With the windows method, the integrators output swing is further reduced. However, this greater reduction is achieved at the cost of a significant increase in the sum of the capacitors of the modulator. The method of multicriteria minimization can be easily integrated in the design process at the system level by replacing the Matlab function commonly used to perform the dynamic range scaling. To validate the method of multicriteria minimization, transistor level simulation are performed on three different configurations. The first two are from the optimization process, one favoring the reduction of the output swing while the other favors the reduction of the capacitors size. The third configuration is the result of a standard design process. It serves as a reference point. The results of these simulations show that an optimized configuration prioritizing the minimization of the integrators output swing get the best performance. The maximum SNR is higher by 3.8 dB and dynamic range is greater by 2 dB compared to perfomances of the reference configuration.

Date	12 Feb 2012
Original language	French
Awarding Institution	École de technologie supérieure
Supervisor	Ghyslain Gagnon (Supervisor)