Efficient FPGA Acceleration of Deep Neural Networks for Image Processing Using an OpenCL-Based High-Level Synthesis Framework

Keyphrases

• Synthesis Framework 100%
• Deep Neural Network Acceleration 40%
• Intensity Analysis 20%
• Loop Latency 20%
• Computational Intensity 20%
• Closed-loop Design 20%
• Hardware Deployment 20%
• Predictive Methodology 20%
• HLS Optimizations 20%
• Guide Field 20%
• Power Envelope 20%
• Heuristic Exploration 20%

Computer Science

• Optimization Decision 20%